Digital Electronics and Computer Organization | 100% Easy

Digital Electronics and Computer Organization

Here, allbca provide you very-very important topics of Digital Electronics and Computer Organization, for your Sem 2nd exam preparation and to increase your knowledge. We are 100% sure, that it will pass you in the Digital Electronics and Computer Organization Exam. And you will have very good marks. Section 'C' contains 15 marks, Section 'B'  7.1/2 marks and Section 'A' 3 marks. 'Stars' represents the possibility of that particular question arrives in the exam. So read them all carefully.

Section 'C' (15 marks) : Digital Electronics and Computer Organization

Q1. Multiplexer? (8*1 MUX Design) (4*1 line multiplexer circuits) (function using 4*10 1 Multiplexer)
Ans. (click here) ★★★★★

Q2. Virtual Memory? (and its organisation) (concept of address translation of the virtual address into physical address)
Ans. (click here) ★★★★★

Q3. universal 'Shift Register'?
Ans. (click here) ★★★★★

Q4. Register? (how data entered and taken out from register)
Ans. (click here) ★★★★

Q5. Asynchronous Counter? (ripple counter) [advantages and disadvantages] (working of 3 bit asynchronous counter)
Ans. (click here) ★★★★

Q6. Static Ram and Dynamic Ram? (difference, merits and demerits) (area of application)
Ans. (click here) ★★★

Q7. Cache Memory and Cache memory organisation? (diagram and working)
Ans. (click here) ★★★

Q8. D Flip-Flop (with diagram) and Master Slave D Flip-Flop? (logic diagram using NAND gate)
Ans. (click here) ★★★

Q9. Encoder? (describe octal to binary encoder)
Ans. (click here) ★★

Q10. ROM? [(types) (advantages)] , PROM, EPROM, EEPROM? (ROM cell circuit and working) (merits, demerits) (area of application)
Ans. (click here) ★★

Q11. How 'JK Flip-Flop' can be converted into 'D Flip-Flop'?
Ans. (click here) ★

Q12. Implement 'Full-Subtractor with 2 ('Half-Subtractor') and 'OR Gate'?
Ans. (click here) ★

Q13. Master-Slave 'JK Flip-Flop' and working? [race around condition]
Ans. (click here) ★

Q14. 'S-R flip-flop'? (advantages) (race around condition)
Ans. (click here) ★★

Q15. Primary memory and Secondary memory? (differences)
Ans. (click here) ★

Section 'B' (7.1/2 marks)

Q1. Simplify the 'Boolean Expression'?
Ans. (click here) ★★

Q2. Reduce 'Boolean expression' using 'K-Map'?
Ans. (click here) ★★

Q3. Reduce the following Equation using 'K-Map'....?
Ans. (click here) ★

Q4. 'Full Adder Circuit' using 'NAND Gate' or 'NOR Gate'? (functioning of circuit) (output of full adder)
Ans. (click here) ★

Q5. De-Morgan's Law (numerical) In Boolean Algebra? (state and varify)
Ans. (click here) ★-

Q6. Boolean expression logic circuit diagram and laws?
Ans. (click here) ★-

Q7. 'Synchronous' (parallel) Counter'? (working principle with diagram) (advantages)
Ans. (click here) ★-

Q8. Associate Memory? (diagram)
Ans. (click here) ★+

Q9. Counter? [4 bit synchronous and asynchronous counter by drawing logical diagram]
Ans. (click here) ★+

Q10. Difference between 'RAM' and 'ROM'?
Ans. (click here) ★-

Section 'A' (3 marks)

Q1. Truth Table and its significance?
Ans. (click here) ★★-

Q2. Logic Gates?
Ans. (click here) ★★+

Q3. Why 'NAND Gate' and 'NOR Gate' more popular?
Ans. (click here) ★

Q4. Operating characteristics of 'Latch'?
Ans. (click here) ★

Q5. Design a 3 to 8 line 'Decoder' using 2 to 4 line decoders?
Ans. (click here) ★+

Q6. Flip-Flop Application?
Ans. (click here) ★+






[ Topic= Digital Electronics and Computer Organization ]



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[ Topic= Digital Electronics and Computer Organization ]
[ Topic= Digital Electronics and Computer Organization ]